TL;DR
Atum Works is 3D printing the 3D devices of the future for 1/10th the cost of today’s 2D lithography.
https://www.youtube.com/watch?v=0n0Di5sLCjo&feature=youtu.be
Problem
“For the past 50 years, semiconductor-technology development has felt like walking inside a tunnel. The road ahead was clear, as there was a well-defined path. And everyone knew what needed to be done: shrink the transistor. Now, we have reached the end of the tunnel."
H.-S. Philip Wong, Chief Scientist, TSMC, 2024.
Today’s 2D lithography has hit a fundamental wall in feature density, so the semiconductor industry has begun stacking 2D layers to fit more transistors, bits, and bandwidth on each chip.
But stacking scales cost exponentially with density, unlike the constant cost days of Moore: a 10-layer high bandwidth memory (HBM) package is ~5x more expensive than the same amount of un-stacked DRAM.
Solution
Using a 3D process to make today's increasingly 3D integrated circuits could shortcut this problem, scaling process complexity with materials rather than layers and enabling the next decade of continued progress.
Our 3D lithography technology can do this: it is capable of fabricating multi-material 3D structures with 100 nm resolution at wafer scale.
Where the ability to create more complex forms enables more complex functions, such granular control of matter enables the future of much more than just chips, including biotech, sensing, and advanced materials.
We recently crossed the cost thresholds that make this technology commercially viable. We are currently in conversation with customers, and will be driving an exponential scaling law in the production capacity of this technology over the coming decade.
What we’ve achieved so far
- Set up our manufacturing facility and lab in Mountain View, CA.
- Built our first 3D nano-printer.
- Acquired our first customers, including an LOI for co-development with NVIDIA.
What’s next
- Sell our first products (this year).
- Exponentially scale production volume.
- SECRET.
Team
We’re a team of physicists and systems engineers from Caltech and NASA, where we previously matured multiple nascent technologies, winning NASA’s Most Visionary Concept and Best Product Development awards.
Advisory Board
Dr. H.-S. Philip Wong: Chief Scientist, TSMC
Dr. Eli Yablonovitch: Director Emeritus of the NSF Center for Energy Efficient Electronics Science (E3S)
Dr. Julia Greer: Director, Caltech Kavli Nanoscience Institute
Dr. Michael Hochberg: Silicon Photonics Pioneer
Dr. Pooya Tadayon: Intel Fellow
Asks
Join our team! If you are, or know any world-class applied physicists, material scientists, chemists, systems engineers, please get in touch!
Become our customer! If you or someone you know needs something unfathomably complex fabricated with a 100 nm minimum feature size, please get in touch!